Semiconductor Engineering

Locking When Emulating Xtensa LX Multi-Core On A Xilinx FPGA

Today’s high-performance computing systems often require the designer to instantiate multiple CPU or DSP cores in their subsystem. However, the performance gained by using multiple CPUs comes with ...
EDN

AXI Chip2Chip Aurora Reference Design for Real-Time Video Applications

The Xilinx® LogiCORE™ IP AXI Chip2Chip core provides bridging between systems using the Advanced eXtensible Interface (AXI) for multi-device system-on-chip solutions. This application note ...
Design-Reuse

Xilinx ISE Design Suite 13.2 Steps Up Designer Productivity and Brings Partial Reconfiguration to Kintex-7, Virtex-7 FPGAs

Latest release also includes improvements for Virtex-7 Quality of Results, enhancements to PlanAhead and continues delivering on Plug-and-Play IP initiative SAN JOSE, Calif., July 6, 2011-- Xilinx, ...
SiliconIndia

Xilinx picks 28nm process for next-generation FPGAs

Bangalore: Programmable logic solutions provider Xilinx has unveiled its architecture for next-generation FPGA products that will be built on 28 nanometer high-k metal gate at TSMC and Samsung. Using ...
EDN

Connecting Custom Peripherals to AXI Using a BRAM Interface for FPGA Design

In this column, we briefly introduce AXI, we examine why FPGA designers would use AXI, and we present some of the pros and cons associated with using AXI The Advanced eXtensible Interface, or AXI, is ...