SAN JOSE, Calif., January 29, 2003 - Xilinx, Inc., (NASDAQ:XLNX) today announced that 3DSP, a leading provider of configurable, scalable digital signal processor (DSP) architecture, used Xilinx chip ...
Xilinx Inc. today announced the appointment of Patrick Little as VP and GM of its complex programmable logic devices (CPLD) division. Little will assume responsibility for all aspects of CPLD product ...
This application note shows how a Xilinx CoolRunnerTM-II CPLD can be used as a simple logical switch that can quickly and reliably select between different MPEG video sources. The source code for the ...
Adding to the CoolRunner-II CPLD family, the XC2C32A and XC2C64A debut in smaller MLF packages than their predecessors and integrate an additional I/O bank to support voltage level translation and ...
Forgive the click bait headline, but the latest work from [Marco Bartolucci] and [José A. del Peral-Rosado] is really great. They’re using multiple HackRFs, synchronized together, with hybrid ...
[PK] is working on a very simple video card, meant to output 640×480 VGA with a cheap CPLD. The interface will be 5 Volt SPI, meaning there’s a ton of potential here for anyone wanting put a ...
Some results have been hidden because they may be inaccessible to you
Show inaccessible results
Feedback